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基于SoC FPGA的ADCP数字回波信号处理系统

An ADCP digital echo signal processing system based on SoC FPGA

  • 摘要: 针对声学多普勒流速剖面仪的设备小型化和高实时性信号处理的需求,提出一种基于SoC FPGA的声学多普勒流速剖面仪数字回波信号处理系统。利用现场可编程逻辑门阵列可以高速并行处理数据的特点,在可编程逻辑端采用基于多相分解的中频正交采样方法构建回波复信号,并且实现复相关计算,得到回波信号的相关函数、相关能量和最大相关能量点位置,最后在处理器系统端中完成频移的计算。实验结果表明,在可编程逻辑端端的回波信号处理速度快,实时性较好,并且具有较高的精确性。

     

    Abstract: The proposed ADCP digital echo signal processing system based on SoC FPGA is designed to meet the requirements of miniaturization and high real-time signal processing for Acoustic Doppler Current Profiler (ADCP). Based on the parallel data processing capability of Field-Programmable Gate Array (FPGA), the IF(intermediate frequency) orthogonal sampling method using polyphase decomposition is employed to generate the echo complex signal at the Programmable Logic (PL) end. Furthermore, complex correlation calculation is performed to obtain the correlation function, correlation energy, and position of maximum correlation energy point in the echo signal. Finally, frequency shift calculation is carried out in the Processor System (PS). Experimental results demonstrate that this approach achieves fast echo signal processing speed at PL terminal with good real-time and high accuracy.

     

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